1. Field of the Invention
The present invention relates to a logic circuit and a liquid crystal display, and more particularly, to a logic circuit which includes pass-transistor logic using field effect thin film transistors (TFTs) and a liquid crystal display which uses the pass-transistor logic circuit.
2. Description of the Related Art
A logic circuit which is used in a semiconductor device is required to have high performance with respect to operation speed, power consumption, occupation area, and operation stability. The demand for improved performance has further increased as systems using semiconductor devices have been further miniaturized and highly integrated.
CMOS logic is well known as a conventional logic circuit. FIGS. 22A to 24B show basic logic gates which include a plurality of field effect transistors coupled between a source supply terminal (VCC) and a grounded terminal (GND). The transistors are operated by utilizing the voltage difference between the source supply voltage and the ground voltage, and a binary logic signal is input to a gate electrode of each transistor.
FIGS. 22A and 22B, respectively, show a circuit structure and the corresponding logic function (INV) of an inverter circuit 1. FIGS. 23A and 23B, respectively, show a circuit structure and the corresponding logic function (NAND) of a negative AND circuit 2. FIGS. 24A and 24B, respectively, show a circuit structure and the corresponding logic function (NOR) of a negative OR circuit 3. A more complicated logic function can be implemented by a combination of these basic logic circuits in accordance with Boolean algebra.
For example, an exclusive OR (XOR) function as shown in FIG. 25A is implemented as an XOR circuit 10 by using two INV circuits 1 and three NOR circuits 2 as shown in FIG. 25B. The XOR circuit 10 is a relatively large circuit in that it requires a large number of gates. FIG. 25C shows a CMOS logic circuit 11 consisting of three XOR circuits 10 cascaded in series. The CMOS logic circuit 11, which includes forty eight (48) transistors, is a significantly large circuit as will be appreciated.
In recent years, a pass-transistor logic circuit has been proposed and has received considerable attention (see, e.g., IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 25, No. 2, April 1990, pp. 388-395). The pass-transistor logic circuit described in such article consists of n-channel MOS transistors. A binary logic signal is input to a gate electrode and a drain electrode so that the number of the transistors included in the logic circuit is reduced in order to realize higher operation speed and to reduce power consumption.
FIGS. 26A to 28B show typical pass-transistor logic circuits. FIGS. 26A and 26B respectively show a circuit structure and the corresponding logic function of an AND/NAND circuit 4. Signals A (/A) and B (/B) are input to the AND/NAND circuit 4, and an AND operation result C and a NAND operation result /C of the signals A and B are output.
Similarly, FIGS. 27A and 27B respectively show a circuit structure and the corresponding logic function of an OR/NOR circuit 5. FIGS. 28A and 28B show, respectively, a circuit structure and the corresponding logic function of an XOR/XNOR circuit 6.
In the case of a relatively simple logic function, such as an AND/NAND or OR/NOR function, there is no significant difference in the number of transistors utilized between the CMOS logic and the pass-transistor logic circuit. However, in a case of a relatively complicated logic function such as XOR/XNOR function, the number of transistors included in the pass-transistor logic circuit is much smaller than the number included in the CMOS logic circuit, as shown FIG. 28A.
The conventional pass-transistor logic circuit described above has the following problems:
Because signals are propagated by the n-channel transistors only, a voltage level of an output signal is intrinsically reduced from the power supply voltage level by an amount of the threshold voltage of the transistors, and the higher voltage level of the output signal alone will not be sufficient. In a case where p-channel transistors are used, the lower voltage level of the output signal is deteriorated.
When n-channel transistors formed in a P-type semiconductor substrate are used, a voltage level of the substrate is set so that an opposite bias voltage is applied between a bulk portion of the substrate and source and drain regions of n-channel transistors in order to operate the transistors stably. In the case, for example, where a signal having a high voltage level is transferred, voltage levels of the source and drain electrodes become higher than that of the substrate. In such a case, an effective threshold voltage (i.e., a gate voltage level of a channel which is formed beneath the gate electrode) becomes higher due to the substrate voltage effect. Accordingly, for example, with a source voltage level of 5V and a threshold voltage of 0.8V , an output voltage level will be about 3.3V, which is reduced by 1.7V from the source voltage level. This reduces an available voltage level for properly operating the transistors of the logic circuit, so that an error operation will occur in the logic circuit unless measures are taken to avoid such error.
In the pass-transistor logic circuit, a load on an input signal which is input to the drain electrode of the transistor is relatively large because the input signal drives (i.e., charges and discharges) a capacitance between the channel and the gate electrode (i.e., the gate insulator capacitance) as well as a parasitic capacitance between the source and drain electrodes and the substrate (i.e., the pn junction capacitance). In the case of a pass-transistor logic circuit which includes multiple basic logic gates connected in series, an input signal is used for driving a plurality of channel-gate capacitances, source-substrate capacitances, and drain-substrate capacitances. Accordingly an output signal from the pass-transistor logic circuit will be deteriorated. In order to eliminate such a problem, a buffer circuit such as an inverter for shaping the output signal is required for every couple of stages of the basic logic gates. The buffer circuit offsets the advantages of high operation speed and reduction of the number of the transistors otherwise obtained by using the pass-transistor logic circuit.
In addition, a pass-transistor logic circuit consists of single type of transistors (n-channel transistors in the above described example), so that the structure of the logic circuit and that of a buffer circuit, which consists of CMOS transistors, are not consistent. The number of n-channel transistors and p-channel transistors used in the logic circuit and the buffer circuit are different, so that the n-channel transistors and p-channel transistors are arranged in a random manner, resulting in a complicated well structure in a semiconductor substrate. For example, a well will have a complicated shape, be divided into many small parts, have a large invalid region, and it will be difficult to provide a stable well source supply, etc. This makes it difficult to arrange an effective well layout for transistors in the semiconductor substrate.